LAM 810-099175-012

Product Name: LAM Research 810-099175-012 — Edge Ring / Wafer Guard Ring (300 mm, Silicon)

Product Overview: A silicon edge ring (wafer guard ring) used on LAM 300 mm electrostatic chucks to protect the wafer edge from plasma exposure and reduce edge bevel during etch processes.

Category:
Description

Technical Specifications:

  • Type: Silicon Edge Ring (Wafer Guard Ring)
  • Diameter: 300 mm
  • Inner Diameter: 296 mm (fits 300 mm wafer with 2 mm clearance)
  • Height: 5 ~ 10 mm
  • Material: Monocrystalline Silicon (99.9999%)
  • Operating Temperature: Up to 400°C

Functional Features:

  • Protects wafer edge from direct plasma exposure — reduces edge bevel by 50~80%
  • Captures edge particles — prevents redeposition on wafer surface
  • Consumable design — replaced on scheduled basis

Performance Parameters:

Parameter Value
Outer Diameter 300 mm
Inner Diameter 296 mm
Height 5 / 8 / 10 mm
Material Mono-Si (99.9999%)
Erosion Rate 0.3 ~ 1.5 µm/hr (Si), 0.02 ~ 0.2 µm/hr (SiC)
Lifespan (Si) 3,000 ~ 8,000 wafers
Lifespan (SiC) 15,000 ~ 40,000 wafers
Flatness < 3 µm TIR
Surface Finish Ra < 0.3 µm

Material Composition:

  • Standard: High-Purity Monocrystalline Silicon
  • Premium: Silicon Carbide (SiC) — 5× longer life, lower particle generation

Structural Features:

  • Annular ring shape
  • Flat top surface, vertical inner wall
  • May include step profile (double-height) for specific process requirements
  • Surface: mirror-polished, Ra < 0.3 µm

Working Principle: The edge ring sits on the ESC surrounding the wafer perimeter. It intercepts the plasma at the wafer edge, reducing the ion flux at the wafer edge and thereby minimizing edge bevel, notch effects, and edge particle generation.

Advantages:

  • Reduces edge bevel by 50~80% — critical for CD control at advanced nodes
  • SiC variant offers 5× longer lifetime and lower particle count
  • Simple drop-in replacement — no tools required for most chambers

Applicable Industries: Semiconductor — All 300 mm plasma etch processes, especially FinFET, GAA, 3D NAND

Model Series: LAM 810-099xxx Series — 300 mm Edge Ring / Guard Ring

Installation Requirements:

  • Place on ESC surrounding the wafer, concentric to wafer center
  • No gas, electrical, or coolant connections required
  • Ensure ring sits flat — no tilting

Usage Notes:

  • Replace when inner wall erosion exceeds 1 mm (Si) or 0.2 mm (SiC)
  • Inspect for micro-cracks before each installation — cracked rings cause particle spikes
  • Store in FOUP or clean carrier — never bare-handle
  • SiC rings are not interchangeable with Si rings without recipe adjustment
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